Lec3

Main points to take away:
Fault models, Concepts of fault equivalence, fault collapsing and fault dominance.
Number of fault sites in a boolean gate circuit =#PI + #gates + #(fanout branches)
Primary inputs and fanout branches are checkpoints
Check point theorem: A test that detects all single(multiple)  stuck-at faults on all checkpoints of a combinational circuit, also detects all [...]

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Lec 2, Slide 6 through 20.

Characterization test: Used to rank test vectors using score-boarding.
Scoreboarding is a centralized method, used in the CDC 6600, for dynamically scheduling a pipeline so that the instructions can execute out of order when there are no conflicts and the hardware is available.
NAC Diode (Net Area check diode): it is a diode, a PN-junction connected [...]

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Lec 2, Slides 4 and 5

Verification testing includes circuit verification and power verification.
Circuit verification: Current, setup time, hold time, clock skew etc , memory check.
Power verification: Avg, max, drop(see inductance),

VRM: Voltage Regulator Module
A voltage regulator module (VRM) is an installable module that senses a computer’s microprocessor voltage requirements and ensures that the correct voltage is maintained. If you are changing [...]

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Lec 2, Sl 3

The main point here to note is that verification is being done at 2 stages 1) during/end of design and after fab (where it is called design validation)
Logic Verification: Using software simulation/emulation
Design Validation: Verification using testers.

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Lecture 2, Slide 2

Slide1: 
Intro. This lecture covers test processes and equipment.
Slide2:
Automatic Test Pattern Generation(ATPG):  EDA method used to determine an input test sequence that, when applied to a digital ckt., enables testers to distinguish between correct circuit behavior and faulty circuit behavior caused by defects.
Diagnostic Testing: Trying to determine as to why the wafer yield is low etc…testing [...]

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